Generally, two masks are used to form a metal line and a via contact in a semiconductor device as shown in FIG. 1A and FIG. 1B. FIG. 1A shows a phase shifting mask (PSM) having about 6% transmittance to form the metal line, according to a related art. FIG. 1B shows a PSM having about 6% transmittance to form the via contact, according to a related art.
FIG. 2A and FIG. 2B are sectional views showing the processes of forming the metal line and the via contact according to a related art. As shown in FIG. 2A, a metal layer 20 made from aluminum or copper is vapor-deposited over a wafer 10. A first photoresist film of a positive tone is applied over the metal layer 20. After that, exposure and developing are performed using the PSM of FIG. 1A, thereby patterning the first photoresist film. In this way, a first photoresist pattern 30 may be formed over the position for forming a metal line.
As shown in FIG. 2B, the metal layer 20 is etched by using the first photoresist pattern 30 over the metal layer 20 as a mask. Accordingly, a metal line 20a is formed over the wafer 10. The first photoresist pattern is then removed. In FIG. 2C, next, an insulating layer 40 such as a tetra ethyl ortho silicate (TEOS) is vapor-deposited over the whole surface of the wafer 10.
In FIG. 2D, next, a second photoresist layer of a positive tone is applied over the insulating layer 40. The second photoresist layer is patterned by performing exposure and developing using the PSM of FIG. 1B, thereby forming a second photoresist pattern over the position to form a via hole. Next, the insulating layer 40 is etched using the second photoresist pattern over the insulating layer 40 as a mask, thereby forming a via hole 50. The second photoresist pattern is then removed. In FIG. 2E, next, a via contact 60 is formed by embedding metal such as aluminum or copper in the via hole 50.
As described above, different PSMs are used in forming the metal line 20a and the via hole 50, respectively, which may induce misalignment between the metal line 20a and the via hole 50 as shown in a section A of FIG. 2D. Such misalignment may affect the resistance characteristics of the device. Without a margin between the metal line 20a and the via hole 50 considered in the design rule, the resistance characteristics may be seriously deteriorated. However, possibility of the misalignment is inevitable according to the related-art method which uses different masks for the metal line 20a and the via hole 50, and accordingly a solution to this issue has been required.